1. Field of the Invention
The present invention relates to a solid-state imaging device. More particularly, the present invention relates to a solid-state imaging device in which a plurality of light-sensitive elements are arranged in a matrix form.
2. Description of the Background Art
There exists a solid-state imaging device, which is typified by a CCD, having a reflecting wall as shown in FIG. 16 in order to efficiently collect oblique light incident from above onto a light-sensitive element. Hereinafter, with reference to FIG. 16, the above-described solid-state imaging device will be described.
The solid-state imaging device as shown in FIG. 16 includes a semiconductor substrate 501, a gate insulating film 502, a gate electrode 503, a photodiode 504, a charge transfer section 505, an interlayer insulating film 506, a light-shielding film 507, an insulating film 509, an intralayer lens 510, a planarization film 511, a reflecting wall 512, a color filter 513, and an on-chip micro lens 514.
The photodiode 504 and the charge transfer section 505 are formed on the semiconductor substrate 501. A surface of the semiconductor substrate 501 is coated with the gate insulating film 502, and the gate electrode 503 is formed on the gate insulating film 502. The interlayer insulating film 506 is formed on the gate electrode 503. Further, the light-shielding film 507 is formed so as to coat the gate insulating film 502 and the interlayer insulating film 506. Note that there is an aperture 515 on the photodiode 504 so that light is received by the photodiode 504.
Also, the insulting film 509 is formed on the light-shielding film 507. The intralayer lens 510 and the planarization film 511 are formed on the insulating film 509. Also, a metal reflecting wall 512 is formed on the light-shielding film 507 so as to partition the pixels individually. Further, the color filter 513 is formed on the planarization film 511. The on-chip micro lens 514 is formed on the color filter 513 for each photodiode 504.
Here, the reflecting wall 512 will be described in detail with reference to FIG. 17. FIG. 17 is an illustration of a solid-state imaging device, in which the semiconductor substrate 501 is viewed from above. FIG. 16 shows a cross section of FIG. 17 at X-X′. Note that FIG. 17 shows only the gate electrode 503, the light-shielding film 507, the reflecting wall 512, and the aperture 515. Also, for the sake of simplification, assume that the solid-state imaging device shown in FIG. 17 has a 6×4 matrix arrangement.
As shown in FIG. 17, each aperture 515 is surrounded by the reflecting walls 512, which are formed on the light-shielding film 507 in a grid pattern. As such, in the conventional solid-state imaging device, the reflecting walls 512 are formed on the light-shielding film 507 so as to surround the pixel. Thus, as shown in FIG. 16, it is possible to collect oblique light incident from above onto the aperture 515. As a result, light sensitivity of the solid-state imaging device is improved (Japanese Laid-Open Patent Publication No. 2001-77339).
In the above-described conventional solid-state imaging device, however, a voltage applied to the gate electrode 503 located at the center of a photoreceiving region including the photodiodes 504 arranged in a matrix form is reduced, which results in a delay in an operation of the gate electrode 503. Hereinafter, with reference to FIG. 17, the above-described problem will be described in detail.
When a voltage is applied to the gate electrode 503, a voltage needs to be applied to a portion of the gate electrode 503 (an encircled portion in FIG. 17) lying off the edge of the photoreceiving region, in which the photodiodes 504 are arranged in a matrix form, since the gate electrode 503 is coated with the light-shielding film 507, or a lens lies above the gate electrode 503, for example, in the photoreceiving region.
The gate electrode 503 is made of polysilicon having a relatively high resistance. Thus, if a voltage is applied only to the edge of the gate electrode 503 as shown in FIG. 17, the applied voltage is reduced in the gate electrode 503 (e.g., the gate electrode located at the center of the photoreceiving region) positioned away from a point to which the voltage is applied. As a result, an operation performed by the gate electrode 503 for detecting a signal charge may be delayed, or a potential required for transferring the detected signal charge may not be generated, for example.
In order to solve the above-described operational delay, there exist solid-state imaging devices disclosed in Japanese Laid-Open Patent Publication No. H6-169079 and Japanese Laid-Open Patent Publication No. H9-331055. Hereinafter, such a solid-state imaging device will be described with reference to the drawings. FIG. 18 is an illustration showing a cross section view of the conventional solid-state imaging device. Also, FIG. 19 is an illustration of the conventional solid-state imaging device, in which the semiconductor substrate 501 is viewed from above. FIG. 18 shows a cross section of FIG. 19 at Y-Y′.
The solid-state imaging device shown in FIG. 18 differs from the solid-state imaging device shown in FIG. 16 in that a contact 508 for connecting the light-shielding film 507 and the gate electrode 503 is formed. As shown in FIG. 19, such contacts 508 are formed at equal spacings across the photoreceiving region of the solid-state imaging device. The solid-state imaging device as shown in FIG. 18 also differs from the solid-state imaging device as shown in FIG. 16 in that the light-shielding film 507 doubles as an interconnection. As for the above-structured solid-state imaging device as shown in FIG. 18, the application of a voltage to the gate electrode 503 will be described below.
First, in FIG. 19, a voltage to be applied to the gate electrode 503 is applied to an upper or a lower end of the light-shielding film 507. When a voltage is applied to the light-shielding film 507, the voltage is then applied to the gate electrode 503 via the contact 508. As a result, the gate electrode 503 is able to detect a signal charge generated by the photodiode 504.
Here, the above-described light-shielding film 507 is made of a metal such as W (tungsten). A value of resistance of a metal such as W is smaller than a value of resistance of polysilicon. Thus, even if a voltage is applied to an upper or lower end of the light-shielding film 507, the voltage is not substantially reduced in the central part of the light-shielding film 507. That is, a voltage of substantially the same level is applied to each contact 508, and a voltage of substantially the same level is applied to each gate electrode 503. As a result, it is possible to eliminate a delay in an operation performed by the gate electrode 503.
However, the problem is that the reflecting wall 512 as shown in FIG. 16 cannot be formed in the solid-state imaging device as shown in FIG. 18. Hereinafter, the above-described problem will be described in detail.
As shown in FIG. 16, the reflecting wall 512 is formed so as to come into contact with the light-shielding film 507. On the other hand, in the solid-state imaging device as shown in FIG. 18, the light-shielding film 507 doubles as an interconnection for applying a voltage to the gate electrode 503. As a result, in the solid-state imaging device as shown in FIG. 18, if the grid-shaped reflecting wall 512 as shown in FIG. 17 is formed so as to come into contact with the light-shielding film 507, the light-shielding films 507 are electrically connected to each other. That is, all gate electrodes 503 are electrically connected to each other. As a result, the solid-state imaging device is not able to operate properly.